Great to see support for RISC-V Zfinx in LLVM 17. A frugal means for #riscv soft processors to support HW FPUs. Now more frugal still with hard FP32 *+- via modern Intel FPGA versatile DSPs and AMD Versal DSP58s.
@jangray I like to imagine the canonical pronunciation of Zvfbfwma is zuv-fub-fwuh-mah
@asb as you may know in the draft proposed composable custom extensions (CX) spec we propose the canonical name for any new composable extension is an unpronounceable 128b GUID. (Decentralized, and industry proven.)
Then in code, a library discovers whether a system is configured with a specific extension via a “friendly” name like CXID_MX6v3 (3rd version of 6b-shared-microexponents extension).
(https://github.com/grayresearch/cx for spec, design&rationale talk, other collateral)
@jangray thanks for the pointer - I'll have to take a closer look