Conversation
hyeyoo

Hyeonggon Yoo

Edited 1 year ago
now I'm slowly getting how CXL manages cache coherence of device memory (HDM-{H,D,DB}). my head aches.

BTW this is a good material to grasp some important concepts of of CXL.

https://arxiv.org/abs/2306.11227

Even if it's not the final version yet.
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