Conversation
jarkko

Jarkko Sakkinen

Have been passive at #LKML because I’m stuck with this page table sync bug in #Keystone: https://github.com/keystone-enclave/keystone/issues/378.

Snippet where it trips:

    sfence.vma
    csrw satp, a0 // switch to virtual addresssing
    sfence.vma

mtval is at the 2nd sfence.vma when misaligned store happens.

This never happens on QEMU and I presume that not on all hardware but I’ve tested this only with CVA6 (running on Genesys2 FPGA board). On QEMU everything just works.

At least, shouldn’t the sfence.vma be sort “useless” as it should continue where stvec is set, right? I guess here one thing to try out would be to simply remove the second sfence.vma?

I’m really just learning RISC-V sync opcodes and do not know e.g. when I should use also fence.i. Just trying different things without tbh knowing exactly what I’m doing yet…

In head.S there is also .align 2 after csrw and I have to admit that I don’t know exactly why… This bug is haunting me…

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jarkko

Jarkko Sakkinen

Reply to @jarkko
One constraint good to be aware of is that Keystone enclaves are always contiguous physical regions. Page tables are only tool for maintaining address space.
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