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Edited 5 months ago
QtRvSim version 0.9.6 released. The #qtrvsim is educational #riscv simulator with pipeline and cache visualization. Version 0.9.6 adds support of M-mode ecalls, ACLINT MTIMER, MSWI, SSWI, related CSR registers, serial port Rx and Tx interrupts and more. See notes on the release page https://github.com/cvut/qtrvsim/releases/tag/v0.9.6 . Online version and related courses materials are available at https://comparch.edu.cvut.cz/ . It provides enough to run, port or implement a simple (no memory protection or paging; M-mode only) operating system with preemptive multitasking.
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