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Edited 1 year ago

Ok, the fact that the "AI" (NPU) chip controller inside Intel's new Meteor Lake CPUs uses SPARC instruction set (from 1990?) was not on my bingo cards for this year. https://chipsandcheese.com/2024/04/22/intel-meteor-lakes-npu/

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@aras I think SPARC ended up in a bunch of things past its commercial due date because of https://en.wikipedia.org/wiki/OpenSPARC and associated IP grants. And the fact that a lot of operating systems and toolchains already supported SPARC.

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@aras Do not get me started. Of all the dumb-ass ISAs for an Intel team to be allowed to use...

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@aras I tried to convince some GPU architects that we should build a massively parallel array of 6502s once.

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@aras not a big suprise, i mean management engine has also used SPARC in the past: https://en.wikichip.org/wiki/intel/management_engine
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@aras It looks like it is based on a design from a company they acquired making DSP chips. So I assume they just went with the ISA the company used to use.

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@antopatriarca @aras it's from movidius who they acquired a few years back. Uses Leon cores

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