Conversation
Jarkko Sakkinen
jarkko
Edited 3 months ago
Learning new cool stuff for the upcoming work, i.e. extending LLVM IR processing :-) There's no pressure to do that but cannot help myself.
If I have a options, I try to pick jobs based getting to do something I've watched from the audience but would require way too much focus without being primary job.
I find it very clever and disruptive to consider RVA20U64 as a bytecode format with only less than 50 opcodes, which trivially map to ARM and x86 user space code. LLVM plugins should be able to do all kinds of optimizations in the JIT architecture, speeding up both the turnaround time of the compilation and quality of the compiled code for the target architecture (i.e. aarch64 or x86_64 in practice).
RISC-V CPU "softcore" (invented this term now because no idea what it is) is at least the first bytecode I actually like.
https://github.com/riscv/riscv-profiles/blob/main/src/profiles.adoc#rva20u64-profile
#riscv
If I have a options, I try to pick jobs based getting to do something I've watched from the audience but would require way too much focus without being primary job.
I find it very clever and disruptive to consider RVA20U64 as a bytecode format with only less than 50 opcodes, which trivially map to ARM and x86 user space code. LLVM plugins should be able to do all kinds of optimizations in the JIT architecture, speeding up both the turnaround time of the compilation and quality of the compiled code for the target architecture (i.e. aarch64 or x86_64 in practice).
RISC-V CPU "softcore" (invented this term now because no idea what it is) is at least the first bytecode I actually like.
https://github.com/riscv/riscv-profiles/blob/main/src/profiles.adoc#rva20u64-profile
#riscv
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