Conversation
Longhorn
never_released@mastodon.social
would you trade having half the SIMD performance (with 128-bit vectors) for a 30-40% increase in perf on scalar code? ðŸ«
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Andrea (Drea) Tamar Pinski
pinskia@hachyderm.ioNow I am curious which soc this is about.
Considering simd is used everywhere even for integer code and the vectorizer of both gcc and llvm are getting to the point where they can vectorize even some Lexing loops.
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@pinskia Apple chips have that
Apple chips are still at 4x128b SIMD today
whereas the higher end x86 chips are at 2x512b (Xeon for intel and Zen 5 for AMD)
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Palmer Dabbelt
palmer
@never_released @pinskia IMO SVE is really way too big of a confounding variable there to treat that as a proper tradeoff...
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@never_released i’d take that trade off any day of the week personally
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Alexander Monakov
amonakov@mastodon.gamedev.place@never_released *single-threaded* scalar code?
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@amonakov Yes, talking about core granularity here
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Palmer Dabbelt
palmer
@never_released @ @hachyderm.io I'm not really an Arm-ologist so I might be wrong here, but IIUC the streaming SVE stuff doesn't allow executing the load/store SVE instructions and thus is much farther decoupled from the integer side of things than full SVE would be.
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