I hope I got this right (safety-proprty), i.e. so that references are enforced to have equal life-time:

impl<'a> From<&'a Header> for &'a [u8] {
    fn from(value: &Header) -> Self {
        // SAFETY: out-of-boundary is not possible, given that the size constraint
        // exists in the struct definition. The lifetime parameter links the lifetime
        // of the header reference to the slice.
        unsafe { from_raw_parts((value as *const Header) as *const u8, size_of::<Header>()) }
    }
}

#rustlang

great implemented transmutable (with u8) enum for the frame type of the #ZMODEM transfer protocol header: https://github.com/jarkkojs/zmodem2/commit/c76316c2ecae097be03506e8ce19d61287e6468a

I can use this as a reference model for refactoring rest of the code base.

Next, I’ll replace encoding: u8 with a similar enum Encoding .

#rustlang

Known good crates for no_std Rust:

1. spinning (used e.g. in #Enarx)
2. heapless

Will be updated over time.

#note #rustlang

After trial and error, i.e. brute force going through crc crate algorithms, I can say that CRC32_32_ISO_HDLC is the correct variant for ZMODEM 32-bit transfers, i.e. cipher can be acquired by:

const CRC32: Crc<u32> = Crc::<u32>::new(&CRC_32_ISO_HDLC);

It is better to declare like this so that it gets compiled into .rodata and not initialized at run-time.

I really like this heapless. It sort of helps to implement my strategy for developing Rust programs:

1.Maximize no_std surface. 2 Minimize heap allocations.

It is easier to see then the hot zones where the program actually dynamically grows for a good reason, similarly as with unsafe blocks it is easy to the red zones for memory errors. This helps a lot with availability and protection against denial-of-service (DoS) attacks.

So to summarize I don’t split Rust program in my mind just to “unsafe” and “safe” but instead I split it “unsafe”, “static” and “dynamic”, or along the lines.

really like this fsmetry crate (also no_std):

fsmentry::dsl! {
    #[derive(Debug)]
    pub Mode {
        WaitingInput -> WaitingCommand -> WaitingInput;
        WaitingCommand -> SendingFile -> WaitingInput;
        WaitingCommand -> ReceivingFile -> WaitingInput;
        WaitingCommand -> Exit;
    }
}

I use it manage life-cycle in my small serial port tool tior. I also have some #zmodem code together but it is apparently much bigger leap to implement the #cli interface than it is to implement the protocol. I had to take some time to refactor existing code (e.g. to put FSM in place) and now I’m doing file path auto-completing interface for sending and receiving files with zmodem.

For the text input I’m going to use inquire.

I guess the definition of feature complete for 0.1 version is fully working zmodem transfers and known bugs have been fixed. Right now there is a single known bug: https://github.com/jarkkojs/tior/issues/1.

#tior #fsmentry #inquire #rustlang

in zmodem protocol there's lot of places where you could "low-barrier" modernize it and i think i'm going after that. like even though there is binary transfer the receiver responds always with hex string for ack's. so that doubles amount of bandwidth for no good.

I've started to use #himalaya as my email client. I switched from mutt to aerc year ago but it has not worked for my intuition but this actually feels a fresh take on #email.

What makes it a fresh take is in my opinion how it reduces the amount of context switching when you have email sort of integrated to the shell. In mutt you can do a lot without leaving the client but this sort of takes away the whole issue and gives full shell access.

software products of finnish software company arisoft. it is fun observation that the whole serial link thing that they had on-going is generation over what people use today when they connect TTL-USB-cable. Arisoft had a MS-DOS software in the early 90s that made possible to "smurf" your way in through the serial and have simultaneous file transfer at the same time. multitasking is imho the future.

so when i look at this web page i'm literally not looking into the past but to one generation ahead in the hopefully not so distant future.

#zmodem #smodem #bbs #serial #tty

it is 2023 and i'm implementing #zmodem just a sub-portion of it: 32-bit binary transfers. So ignoring 16-bit and alternative hex protocol. There's some non lively looking zmodem crate and of course lrzsz but neither of them feel too inspiring to contribute or build on top off.

all sort of glitch with #rustlang community comes to personally in the end how you look at a programming language: a language or purely just an opcode generator. one example of such glitch is IMHO unrobust handling of OOM conditions. So you end up getting safe but and super fat and resource wasteful user space programs. But still memory-safe in the language level, which does not provide safety for e.g. any possible DoS attack.

tonights jam, something in progress #bitwig

Lot's of RISC-V posts but here's one more. I think it has a strong future in post-#quantum world. QPU is like GPU, i.e. it is great for certain types of computations but it sucks for branching binary logic that I/O relies on. In that world correctness of stuff that is done with semiconductors is hugely more important than now and that's where open, modular and within constraints formally verifiable CPU architecture shines.

#riscv

If most of firmware stack in RISC-V was rustified so that you could build compatible SBI implementation with cargo build, that would be the most effective embedded product creation platform that I could think of. You could move from product idea rapidly to a product PoC.

#riscv #rustlang

I wonder if #BeagleV has similar #DIP switch as #VisionFive2, which works as a selector for different boot modes?

In VisionFive2 you can choose to:

1. Boot from SPI flash.
2. Boot from SD (including U-boot and OpenSBI, assumes a particular partition layout).
3. Rescue UART boot mode.

These VisionFive2 e.g. pretty capable board for prototyping CPU extensions.

#riscv #sbc #uboot #opensbi

I like how easy it is with RISC-V to emulation ISA extensions by emulating privileged instructions in M-mode. that makes it pretty good production creation platform when you have something in-between FPGA and QEMU. I.e. you can take ASIC board and build a PoC with customized OpenSBI. #riscv #opensbi #fpga #qemu

after years of using #voxengo #span i've started using #tokyodawnlab's new and free #prism: https://www.tokyodawn.net/tdr-prism/

Nice, with the DIP switches Starfive VisionFive 2 SBC can be made to boot the full chain from SD card. Initially booting from SPI flash for any possible use for this never really makes sense. It is a badly chosen default for this sort of maker and/or developer product :-) #riscv #opensbi #uboot #starfive #visionfive2 #keystone

Log grabbing pattern for pretty_env_logger. when tracing #Rust #TUI applications;

RUST_LOG=debug target/debug/tior open /dev/ttyUSB0 2> log.txt

#rustlang

great, now #tior #serial #terminal tool has UTF-8/escape code encoder for most relevant key presses without modifier key. i guess now is a good time to look at #zmodem support. it is just disjoint state for the TTY session, and in the end might be easier part.