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Embedded, open-source, and open-hardware enthusiast interested in passing knowledge to next generation. OpenHub https://openhub.net/accounts/ppisa/positions . For our computer architectures education see https://comparch.edu.cvut.cz/ .
Edited 8 days ago

Hi , let's start our journey here with our . We are project by . We develop and produce with focus on running distribution based on . Of course, we provide automatic and accounts. We have a of running on our devices and create a dynamic based on the data.

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The b̵i̵r̵d̵ elephant is free. Aneb jak nám došla trpělivost s X. https://blog.cesko.digital/2024/11/odchazime_z_x

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Linux 6.12 Released With Real-Time Capabilities, Sched_Ext, More AMD RDNA4 & More

As expected, minutes ago Linus Torvalds just released the Linux 6.12 kernel as stable. Linux 6.12 brings many new features, new hardware support, and is rounded out by the fact of expected to become this year's Long Term Support (LTS) kernel version...
https://www.phoronix.com/news/Linux-6.12-Released

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There are slides about the PREEMP_RT evolution based on my followup, use and experiments with GNU/Linux in #realtime projects from time about 2.6.18 kernel version - Linux RT Patches Mainlining – Submission Wrapped in the Gold. The talk has been presented on OpenAlt 2024 conference. There is recording in Czech language. If there is interest, I can prepare presentation in English or I am open to provide my photos and materials from 20 years history if somebody wants to prepare better presentation. I have prepared more RT and #osadl RT testing related articles usually with English text but often witch Czech language recording for local community. The list is there https://gitlab.fel.cvut.cz/otrees/org/-/wikis/knowbase.

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Edited 1 month ago
DevConf 2023 CAN Bus in Control, Automotive and Satellitelites direct recording https://youtu.be/RwmQYjfzQAg and slides https://static.sched.com/hosted_files/devconfcz2023/f2/devcon23_linux_can_latency.pdf links added for archival purposes. The projects are active and we monitor current mainline and RT kernels daily for more than year https://canbus.pages.fel.cvut.cz/#can-bus-channels-mutual-latency-testing as well as support CTU CAN FD IP core integration to chips and its and other #CANbus drivers for more OSes and QEMU simulations.
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Thanks for the TDE maintenance. I use it on my laptop and like that I can use same home, address book and e-mail setup for decades.
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Edited 1 month ago
It is in line with David Patterson's today retrospective presentation about his and Krste Asanovic 2014 article which started #RISCV movement - Instruction Sets Should Be Free: The Case For RISC-V https://people.eecs.berkeley.edu/~krste/papers/EECS-2014-146.pdf . It is the same as for the operating systems, compilers, development tools, etc.
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Our site with the on-line simulator and pointers to the courses and related materials https://comparch.edu.cvut.cz/ . CTU FEE ones are completely free as the public university materials should be free for profit of whole society the same as the ISA and other technology standards.
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Edited 1 month ago
Greetings from the RISC-V Summit North America 2024 https://riscv.org/event/risc-v-summit-north-america-2024/ . Many interesting topics have been presented there. My main interest is to connect with other computer architecture teachers to discuss materials and experience sharing in the frame of #RISCV SIG Academia and Training. In the picture is David Patterson after my introduction of #QtRvSim to him.
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Edited 2 months ago

PMSM motor control on ICE-V Wireless (#Espressif #RiscV ESP32-C6 + iCE-40 #FPGA) project has been presented at #LinuxDays https://pretalx.linuxdays.cz/linuxdays-2024/talk/QGST3J/ (Video in Czech ), (Presentation PDF - English), Jakub Janousek’s related thesis (PDF - Engish) and project site https://gitlab.fel.cvut.cz/otrees/risc-v-esp32/ice-v-pmsm . Presentation starts with robotic platform based on ESP32-C6 chosen as cheap option for teaching Microcomputer Engineering with Space Applications course @LTUniv in #Kiruna in #SpaceMaster https://spacemaster.eu/ on M-Bot like platform. The related QENC driver by Martin Vajnar for ESP32-C6 is in mainline #NuttX now.

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Part of CTU FEE OTREES HW ZOO at #LinuxDays booth. On the left , #RiscV #milkvpioneer with #fedora desktop running #CHROMuLAN, #qtrvsim with new branch predictors visualization and Elektroline.cz Silicon-Heaven SHVspy https://github.com/silicon-heaven/libshv. On the right, x86 Debian running Silicon-Heaven broker and #pysimCoder https://github.com/robertobucher/pysimCoder to generate and runtime tune PMSM control application running on #NuttX on open-source motion control platform SaMoCon https://gitlab.fel.cvut.cz/otrees/motion/samocon which is a result of Stepan Pressl's thesis https://wiki.control.fel.cvut.cz/mediawiki/images/4/44/Bp_2024_pressl_stepan.pdf . On the left in front, MZ_APO Xilinx Zynq based educational kit running Debian from NFS RO root. Its FPGA is configured by 2x CTU CAN FD, PMSM motor control peripherals and RVapo #riscv soft core co-processor used for inverse and forward Park and Clarke transformations for PWM, current sensing and calibration all running at 20 kHz in sync with PWM cycles. The soft core was started by Eduard Lavus as PAP course project and has been extended and integrated with PMSM by Damir Gruncl - see more about these projects in the OTREES theses list https://gitlab.fel.cvut.cz/otrees/org/-/wikis/theses-defend
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Thanks for the visit and effort invested into Fedora on #RiscV, #milkvpioneer and in general.
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Edited 2 months ago
Our #qtmips simulator has received some minor care as well. Actual release includes Jakub Dupak's memory simulation rework (initially part of RISC-V switch preparation) which allows to run both little and big-endian ELF files. Integrated editor and assembler targets big-endian target only (there is no switch for interactive endianness choice). See https://github.com/cvut/QtMips/releases
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Edited 2 months ago
Damir Gruncl has designed (as part of his thesis - see OTREE thesis list https://gitlab.fel.cvut.cz/otrees/org/-/wikis/theses-defend) RISC-V processor (RVapo) which corresponds to QtRvSim. Sources https://gitlab.fel.cvut.cz/otrees/fpga/rvapo-vhdl . Can be simulated by GHDL, and it is used on Xilinx Zynq as coprocessor for inverse and forward Clarke and Park transformations for PWM cycle by cycle (20 kHz) PMSM motor control (project
https://gitlab.fel.cvut.cz/otrees/fpga/rvapo-apps/-/tree/master/apps/rvapo-pmsm)
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I will be happy to see you at RISC-V Summit North America and discuss teaching, Linux, RTEMS, NuttX real time topics and development, motion control and robotics.
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Edited 2 months ago
New release of #qtrvsim #riscv simulator for education. QtRvSim v0.9.8 adds Jiri Stefan's work on branch predictor. Its visualization extends cache, pipeline, memory and other visualization capabilities (https://github.com/cvut/qtrvsim/releases). Online version available at https://comparch.edu.cvut.cz/ . There is new WebEvaluator site link and description available (work of Jakub Pelc) for training on simple assembly and C tasks. The project will be discussed at RISC-V International Special Interest Group: Academia and Training meeting at October 10 2024 at 8 AM Pacific Time (5 PM CEST). The feedback is welcomed. I will be present on 2024 RISC-V Summit North America too.
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Je nejvyšší čas přihlásit přednášku na konferenci 2024. Termín pro poslání přihlášek je do konce týdne.

https://talks.openalt.cz/openalt-2024/cfp

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Edited 2 months ago
In the fact, there has been the cover letter on the paper top, but it is of less interest to me. On the other hand, it lists included ARM64 and RISC-V in addition to x86, which I see as very important
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=baeb9a7d8b60b021d907127509c44507539c15e5
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Last night at the real-time celebration, Thomas Gleixner handed Linus Torvalds his official pull request of the real-time patch on paper "wrapped in gold with a ribbon around it''
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