Pavel Pisa
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PMSM motor control on ICE-V Wireless (#Espressif #RiscV ESP32-C6 + iCE-40 #FPGA) project has been presented at #LinuxDays https://pretalx.linuxdays.cz/linuxdays-2024/talk/QGST3J/ (Video in Czech ), (Presentation PDF - English), Jakub Janousek’s related thesis (PDF - Engish) and project site https://gitlab.fel.cvut.cz/otrees/risc-v-esp32/ice-v-pmsm . Presentation starts with robotic platform based on ESP32-C6 chosen as cheap option for teaching Microcomputer Engineering with Space Applications course @LTUniv in #Kiruna in #SpaceMaster https://spacemaster.eu/ on M-Bot like platform. The related QENC driver by Martin Vajnar for ESP32-C6 is in mainline #NuttX now.
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Pavel Pisa
ppisa
Part of CTU FEE OTREES HW ZOO at #LinuxDays booth. On the left , #RiscV #milkvpioneer with #fedora desktop running #CHROMuLAN, #qtrvsim with new branch predictors visualization and Elektroline.cz Silicon-Heaven SHVspy https://github.com/silicon-heaven/libshv. On the right, x86 Debian running Silicon-Heaven broker and #pysimCoder https://github.com/robertobucher/pysimCoder to generate and runtime tune PMSM control application running on #NuttX on open-source motion control platform SaMoCon https://gitlab.fel.cvut.cz/otrees/motion/samocon which is a result of Stepan Pressl's thesis https://wiki.control.fel.cvut.cz/mediawiki/images/4/44/Bp_2024_pressl_stepan.pdf . On the left in front, MZ_APO Xilinx Zynq based educational kit running Debian from NFS RO root. Its FPGA is configured by 2x CTU CAN FD, PMSM motor control peripherals and RVapo #riscv soft core co-processor used for inverse and forward Park and Clarke transformations for PWM, current sensing and calibration all running at 20 kHz in sync with PWM cycles. The soft core was started by Eduard Lavus as PAP course project and has been extended and integrated with PMSM by Damir Gruncl - see more about these projects in the OTREES theses list https://gitlab.fel.cvut.cz/otrees/org/-/wikis/theses-defend
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Pavel Pisa
ppisa
Edited 14 days ago
New release of #qtrvsim #riscv simulator for education. QtRvSim v0.9.8 adds Jiri Stefan's work on branch predictor. Its visualization extends cache, pipeline, memory and other visualization capabilities (https://github.com/cvut/qtrvsim/releases). Online version available at https://comparch.edu.cvut.cz/ . There is new WebEvaluator site link and description available (work of Jakub Pelc) for training on simple assembly and C tasks. The project will be discussed at RISC-V International Special Interest Group: Academia and Training meeting at October 10 2024 at 8 AM Pacific Time (5 PM CEST). The feedback is welcomed. I will be present on 2024 RISC-V Summit North America too.
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In the fact, there has been the cover letter on the paper top, but it is of less interest to me. On the other hand, it lists included ARM64 and RISC-V in addition to x86, which I see as very important
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=baeb9a7d8b60b021d907127509c44507539c15e5
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=baeb9a7d8b60b021d907127509c44507539c15e5
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Pavel Pisa
ppisa
Edited 2 months ago
#CHROMuLAN running chromatography data acquisition from ULAD32 on Milk-V Pioneer box #milkvpioneer 64-core RISC-V system. Application has been built on that system as well as #freepascal and #Lazarus LCL actual mainline GIT versions. uLAN kernel driver for instruments connection and control has been build directly on the system as well. Our #QtRvSim #Qt based simulator builds and on this #riscv system as well. More about our open-source chromatography system serving users more than 20 years there https://sourceforge.net/projects/chromulan/
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Pavel Pisa
ppisa
Edited 5 months ago
We will present our new #canbus (CAN/CAN FD) stack for #RTEMS (https://www.rtems.org/) on #CiA_iCC https://old.can-cia.org/icc in Baden-Baden on Wednesday 15. The stack is based on our LinCAN Linux driver (initiated in 2003 as part of https://ortcan.sourceforge.net/ ). The new code source and documentation is available at https://gitlab.fel.cvut.cz/otrees/rtems/rtems-canfd . Our presentation "Scheduling of CAN frame transmission when multiple FIFOs with assigned priorities are used in RTOS drivers" is relevant even for future Linux #SocketCAN stack to solve its long standing link level priority inversion problem at least for some controllers when multi-queue support is implemented and our previous QoS work is updated. The measured latency results on #zynq on #RTEMS are great and in order better than maximal ones on PREEMP_RT Linux https://canbus.pages.fel.cvut.cz/#can-bus-channels-mutual-latency-testing . So there is lot to do on Linux side as well.
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Pavel Pisa
ppisa
Edited 6 months ago
Our #riscv and computer architectures course materials and videos updated https://cw.fel.cvut.cz/wiki/courses/b35apo/en/lectures/start (switch to LaTeX, slides sources available). New online #riscv assembly and low level C-language tasks online evaluation, training site added https://eval.comparch.edu.cvut.cz/ as companion to our #qtrvsim online and native educational simulator https://github.com/cvut/qtrvsim
If you are interested in materials or want to see our hardware ZOO, stop at #osadl booth (in hall 4, booth 4-168) at #embeddedworld #ew24 . OSADL https://www.osadl.org/ has been kind to provide us space there on our academic membership base. We will have GNU/Linux, RTEMS, NuttX ARM and RISC-V HW running there.
If you are interested in materials or want to see our hardware ZOO, stop at #osadl booth (in hall 4, booth 4-168) at #embeddedworld #ew24 . OSADL https://www.osadl.org/ has been kind to provide us space there on our academic membership base. We will have GNU/Linux, RTEMS, NuttX ARM and RISC-V HW running there.
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Pavel Pisa
ppisa
Edited 10 months ago
QtRvSim version 0.9.6 released. The #qtrvsim is educational #riscv simulator with pipeline and cache visualization. Version 0.9.6 adds support of M-mode ecalls, ACLINT MTIMER, MSWI, SSWI, related CSR registers, serial port Rx and Tx interrupts and more. See notes on the release page https://github.com/cvut/qtrvsim/releases/tag/v0.9.6 . Online version and related courses materials are available at https://comparch.edu.cvut.cz/ . It provides enough to run, port or implement a simple (no memory protection or paging; M-mode only) operating system with preemptive multitasking.
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Pavel Pisa
ppisa
Booth presenting open technologies at #LinuxDays 2023. uLAN project https://ulan.sourceforge.net/ used in PiKRON's instruments, agriculture and even in home automation prototype at CTU, full presentation of its 30-years in use https://ulan.sourceforge.net/pdf/ulan-linuxdays23-slides.pdf . The #QtRvSim, RISC-V simulator has been presented as well. #pysimCoder generated code controls motor on #MZ_APO educational kit designed for CTU courses. Open motion base board for Teensy-4.1 is on the right, same as #VisionFive2. See more about related activities at Open Technologies Research Education and Exchange Services (unofficial CTU FEE group) pages https://gitlab.fel.cvut.cz/otrees/org/-/wikis/knowbase
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Pavel Pisa
ppisa
Edited 1 year ago
#qtrvsim educational simulator compiled and running on real #riscv. #visionfive2 provided from RISCV.org developer boards program just arrived today so native build and run of https://github.com/cvut/qtrvsim was tempting.
Simulator can be used with internal assembler or can run simple RV32IM and RV64IM static ELF binaries including even 7 Linux kernel system calls. Packages are provided for x86 and ARM GNU/Linux, Windows, Mac and browser version is available too https://comparch.edu.cvut.cz/ but running it on architecture which it supports and is used for teaching is pleasant step forward.
Simulator can be used with internal assembler or can run simple RV32IM and RV64IM static ELF binaries including even 7 Linux kernel system calls. Packages are provided for x86 and ARM GNU/Linux, Windows, Mac and browser version is available too https://comparch.edu.cvut.cz/ but running it on architecture which it supports and is used for teaching is pleasant step forward.
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