I'm trying to get #Keystone #SM ongoing with #CVA6 but stuck with SM's trap handler giving me illegal instruction. I wonder how interpret these values for #mideleg and #medeleg: https://github.com/keystone-enclave/keystone/issues/374#issuecomment-1777032123 #riscv #opensbi

I wish I had one of those #UDOO #BOLT boards so I could test #TPM and trusted keys better with #AMD #hardware. #linux #kernel

is EP same as big.LITTLE with different branding? https://eclecticlight.co/2023/10/23/how-does-macos-manage-virtual-cores-on-apple-silicon/ #arm

#pikvm is great :-)

@conor @gregkh Thanks for the clarification. I'm pretty early stages on learning how whole RISC-V ecosystem works :-)

@gregkh @conor Stable firmware extension to be exact. It works on a standard RISC-V CPU with MMU. It even works on my VisionFive 2 RISC-V board: https://github.com/keystone-enclave/keystone/issues/339. It is more like in the area of TrustZone than big cloud things like SGX or SEV-SNP, providing tools to implement secure boot and stuff like that. Thus, I see worth of doing this on side up because I really believe that it is a piece that RISC-V needs something like this to be successful. I'll move forward in upstreaming if it becomes official part of OpenSBI firmware.

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@gregkh @conor OK, fair enough. Project was basing on v5.19 so it was easiest to start with that. I've tried it recently with the recent kernels and it works just fine. Since it is not nearly as complicated as e.g. SGX is, I just maintain my tree up until Keystone is a stable extension.

debugging issue with #SBI. i’m a newbie on this so just found out that you can inject traces with sbi_printf(). not sure but i guess you also have to have CONFIG_HVC_RISCV_SBI=y set in #kernel? #linux #riscv #sbi

@neil for me a misbehaving raspberry is an asset for kernel qa :-) 3B+ with broken trustzone, can put your own workloads there

@conor ... and thus it is a non-issue for me if this cannot go to e.g. staging. The priority is to get the Keystone project use a kernel patch instead of OOT driver. While at it, it really does not hurt to ask from @gregkh if this can be picked to staging but not a thing thah I'm go to do today or tomorrow. Still because this works on standard hardware, it *does* make sense for Linux *at some point* (and open source firmware extension).

Seems much less difficult exercise than the one I had with Intel SGX in the past...

@conor Generally for any TEE using it as a module has zero real world applications.

@conor I would like to also point out that Keystone driver is better to be a subsystem in vmlinux because it offers broader scope of applications than e.g. SGX or SEV-SNP, i.e. kernel could run payloads there and thus other subsystems could find use for it. For instance, we could possibly have backend for trusted keys and stuff like that. But for now either my korg tree or staging at most are the most appropriate...

@conor yeah, I mean for staging afaik the main requirement is that there is someone keeping the driver up to date but otherwise it is not that conservative. so feels like a good location at this point.

@conor yeah, the honest truth is that I just place it somewhere :-) i think the appropriate place if anywhere in the mainline would drivers/staging for the moment.

@conor it is highly CPU architecture dependent feature and any TEE must be part of the boot flow so I don't think it should linkable as module at all. As part of the boot flow any possible in-kernel use cases are enabled, i.e. other subsystems could have Keystone backend. Thus, I think it is best pick for now.

I can request riscv-keystone@vger.kernel.org if there is broader interest on this work.

@monsieuricon

I’ve opened up #development #git tree for in-kernel #Keystone #enclave #driver:

https://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-riscv-keystone.git/

Existing branches:

• keystone: follows Linus’ tree.
• keystone-5.19.y: I’m actively trying to get Genesys2 FPGA hosting CVA6 working with this kernel version. Buddy allocator works but the use of dma_alloc_coherent() to allocate contiguous physical memory for enclaves freezes the system when it is being used (not in the call itself).

Keystone enclaves are applications hosted by Keystone security monitor running inside #OpenSBI, and partitioned and protected by physical memory protection (usually shortened as PMP) machine registers.

PMP is part of standard RISC-V ISA, which means that Keystone enclaves are usable with any RISC-V CPU with MMU. There is nothing that would prevent this coming eventually a mainline feature because it works for without non-standard or proprietary components involved.

Another favorable element of having Keystone enclaves as kernel feature is that Keystones enclave can run both in U-mode and S-mode meaning that kernel subsystems could use the feature too (if wanted). For instance, #Intel #SGX can host only ring-3 enclaves, which limits its scope.

#linux #kernel #riscv #cva6

@rjzak have impossible week with work but i'll check as soon as i have time, lot's unexpected stuff apologies