Hyeonggon Yoo
Posts
474Following
89Followers
94- Ex-Intern @ NVIDIA Korea (Security System Software) (2024.06-2024.11)
- Ex-Intern @ Panmneisa (CXL emulation stuff) (~2023.12)
- Undergraduate majoring CSE (estimated graduation: Feb. 2025)
- Working as reviewer at Linux Slab subsystem
- Born in August 6, 2000
Opinions are my own.
My interests are:
Memory Management,
Computer Architecture,
Circuit Design,
Virtualization
@vbabka tbh I'm not sure, but at least git repos that are regularly merged to linux-next shouldn't use that policy ;)
Anyway the policy seems to work quite well!
https://lore.kernel.org/linux-mm/CAB=+i9Sw1YSdUKrjygA5cOsVjQMVmS8-KJ+ku4AG9Fw_2guENQ@mail.gmail.com/T/#t
Anyway the policy seems to work quite well!
https://lore.kernel.org/linux-mm/CAB=+i9Sw1YSdUKrjygA5cOsVjQMVmS8-KJ+ku4AG9Fw_2guENQ@mail.gmail.com/T/#t
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Hyeonggon Yoo
hyeyoo
Hmm when running builds and testcases, my machine sometimes becomes very unstable and stuck for a while.
this causes some build/test failures because git clone or job submit timeouts are exceeded.
it's very annoying and I need to fix, but I couldn't find out why. I need to setup a monitoring system...
this causes some build/test failures because git clone or job submit timeouts are exceeded.
it's very annoying and I need to fix, but I couldn't find out why. I need to setup a monitoring system...
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@vbabka
https://git.kerneltesting.org/slab-experimental
Here it is!
This is the first kernel repository that adopts "merge first and then drop if it's broken" policy ;)
https://git.kerneltesting.org/slab-experimental
Here it is!
This is the first kernel repository that adopts "merge first and then drop if it's broken" policy ;)
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Hyeonggon Yoo
hyeyoo
Dealing with large git repositories in Jenkins
https://www.jenkins.io/files/2016/jenkins-world/large-git-repos.pdf
https://randyfay.com/content/reference-cache-repositories-speed-clones-git-clone-reference
https://www.jenkins.io/files/2016/jenkins-world/large-git-repos.pdf
https://randyfay.com/content/reference-cache-repositories-speed-clones-git-clone-reference
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Hyeonggon Yoo
hyeyoo
Edited 1 year ago
now I'm slowly getting how CXL manages cache coherence of device memory (HDM-{H,D,DB}). my head aches.
BTW this is a good material to grasp some important concepts of of CXL.
https://arxiv.org/abs/2306.11227
Even if it's not the final version yet.
BTW this is a good material to grasp some important concepts of of CXL.
https://arxiv.org/abs/2306.11227
Even if it's not the final version yet.
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Hyeonggon Yoo
hyeyoo
Edited 1 year ago
progress of this week:
#kerneltesting side project
Now my testing system can submit and run LAVA [1] test jobs automatically after jenkins [2] build!
[1] https://lava.kerneltesting.org/scheduler/alljobs
[2] https://jenkins.kerneltesting.org/job/slab/
currently it runs those:
- a subset of mm LTP testcases
- hackbench for a very short time
#kerneltesting side project
Now my testing system can submit and run LAVA [1] test jobs automatically after jenkins [2] build!
[1] https://lava.kerneltesting.org/scheduler/alljobs
[2] https://jenkins.kerneltesting.org/job/slab/
currently it runs those:
- a subset of mm LTP testcases
- hackbench for a very short time
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Hyeonggon Yoo
repeated
repeated
Chris Gioran 💔
chrisg@fosstodon.org@hyeyoo Have you watched Ben Eater's videos on YT, where he builds a CPU on breadboards?
If you follow his videos from the start, a lot of concepts that you've heard about but don't currently get will click.
At least they did for me.
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@ptesarik
Then now I wonder how the error rate is well under control then....
And as a person who doesn't know quantum mechanics - have a question:
Even are systems with ECC memory safe enough?
Safe enough to be used for electronic money transfer, satellites, and nuclear weapons?
Then now I wonder how the error rate is well under control then....
And as a person who doesn't know quantum mechanics - have a question:
Even are systems with ECC memory safe enough?
Safe enough to be used for electronic money transfer, satellites, and nuclear weapons?
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Hyeonggon Yoo
hyeyoo
Edited 1 year ago
```
As a bit of history, in the early days of PCI the spec writers anticipated cases
where PCI would actually replace the processor bus.
```
from "PCI Express Technology 3.0", MindShare
And yeah, that seems to be revived in 2019 by Intel, in the name of IAL (Intel Accelerator Link), which was renamed to CXL (Compute Express Link) later. The main reason why Intel donated IAL was to avoid making the industry fragmented. Later CXL consortium was founded and over 250 companies now contribute to the specification. Including my company! (who hired me as an intern)
As a bit of history, in the early days of PCI the spec writers anticipated cases
where PCI would actually replace the processor bus.
```
from "PCI Express Technology 3.0", MindShare
And yeah, that seems to be revived in 2019 by Intel, in the name of IAL (Intel Accelerator Link), which was renamed to CXL (Compute Express Link) later. The main reason why Intel donated IAL was to avoid making the industry fragmented. Later CXL consortium was founded and over 250 companies now contribute to the specification. Including my company! (who hired me as an intern)
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