Posts
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Followers
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n00b Kernel Hacker
- Linux Kernel Developer @ Oracle (Linux Kernel MM) (2025.02 ~ Present)
- Ex-Intern @ SK Hynix (Linux Kernel MM) (2024.12 ~ 2025.01)
- Ex-Intern @ NVIDIA Korea (Security System Software) (2024.06 ~ 2024.11)
- Ex-Intern @ Panmneisa (CXL emulation stuff) (2023.09 ~ 2023.12)
- Undergraduate majoring CSE (estimated graduation: Feb. 2025)
- Working as reviewer at Linux Slab subsystem
- Born in August 6, 2000

Opinions are my own.

My interests are:
Memory Management,
Computer Architecture,
Circuit Design,
Virtualization
@ljs

Haha I'm 2 years younger than yesterday!
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The traditional Korean age system has been retired in South Korea, and now we use the international standard aging system.

I was 24 in the Korean age system, but now I'm legally 22 :P

https://www.bbc.com/news/world-asia-63903771
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@ljs thanks ;) and I hope to finish it sooooon
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Edited 1 year ago
@ljs wait did u sleep in the library lol
(I slept in my friends lab...)
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@ljs yes this semester is finished and it's summer break!
(but still have 3 semesters left T.T)

btw I was supposed to do an internship at a cloud company this year but seems I am almost ditched so now looking for undergraduate research internships :P
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@ljs no it's all done but my timezone is still shifted
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still haven't recovered from jet lag (?) from the final exam period. today went to bed at 11 PM, woke up at 2 AM, and it's now 6 AM.
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Edited 1 year ago
sometimes wanna stop posting normally and just shitpost all the time
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@ljs @kernellogger @sj

or a prompt confirming if you really know what you're doing ;)

BTW what would be different if it were in /sys/kernel/mm?
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Edited 1 year ago
started wondering where it's documented that x86 processors deal with the synonym problem, as they use VIPT data caches.

on ARMv8 processors there is an architectural guarantee that data caches acts as PIPT cache even if it's actually VIPT, so it's guaranteed not to suffer from D-cache aliasing.

I've been heard that there is a similar guarantee on x86 processors but haven't found any official references about it - errr, I guess it's time to read some part of the intel manual.

btw this is quite old but is very nice introduction:
https://www.linuxjournal.com/article/7105
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@ljs @kernellogger @sj

LOL what
you mean /proc/sys/vm/drop_caches?
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@ljs @kernellogger @sj

Ah, I added sj because IIRC he's planning implement an auto tuner for DAMON parameters - no one should be like "bpftune can tune everything and make more parameters"

it would have been horrible if i.e. active/inactive list balancing was implemented as a kernel parameter :P
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@ljs @kernellogger @sj

That's a perspective I didn't have, and it makes sense. So, it's like performing CPR on this messed-up situation?
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Edited 1 year ago
@kernellogger

@sj you might be interested in adapting DAMON parameters?
btw I wonder how broad range of parameters could be covered
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@kernellogger WOW that is amazing work!
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Edited 1 year ago
@vbabka @ljs would running mm-stable make it stable again? 🥲 I didn't threw it away yet
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@ljs please do the same to overgrown MM code
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@cwayne @ljs is it better than normal tablets (like ipad)?
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Edited 1 year ago
I bought a new graphics card yesterday, and it came with a freebie. now my machine hangs whenever I boot a kernel with lockdep enabled.

Here is the link to the issue I posted on GitLab: https://gitlab.freedesktop.org/drm/nouveau/-/issues/237

BTW does DRM folks prefer using GitLab or the mailing list?
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